The present invention relates generally to texture pipelines, and more specifically to reconfigurable, high-performance texture pipelines capable of advanced filtering.
The complexity and realism of graphics images has increased tremendously during the past few years, yet the demand for further increases shows no signs of abating. Accordingly, the amount of data that needs to be processed to generate graphics images for games, commercial applications, and other uses will continue to grow for the foreseeable future.
Textures are one type of data that is processed by graphics processors in increasing numbers. Textures provide surface patterns and colors for objects in graphics images. These textures are made up of individual units referred to as texels. Typically, one or more groups of texels in one or more texture levels map into each pixel that is displayed. Each group of texels is filtered by a texture filter, then used in generating the color values and transparency for the corresponding pixel.
There are several types of filtering that may be used. Commonly, one pixel maps into a set of four texels arranged in a two by two array. Such an array of texels is referred to as a texel quad or bilerp. The filtering or averaging of these four texels is referred to as bilinear filtering.
Often, different sizes of a texture, referred to as different levels of detail, or LODs, are used. Larger textures are used for objects that appear to be closer to a viewer; the smaller textures are for more distant objects. On occasion, a location between two LODs maps into a pixel. In such a case, two bilerps, one from each LOD, are filtered in a process referred to as trilinear filtering.
Also, a region of texels that includes more than one bilerp in one texture level may map into a pixel. The processing of these bilerps is referred to as aniso filtering. For example, if two bilerps map into a pixel, 2:1 aniso filtering is needed. On occasion, 4:1, 6:1, 8:1, and other aniso ratios may be used.
Texels are stored in a cache memory and retrieved as needed. When trilinear or higher orders of aniso filtering are needed, greater numbers of bilerps need to be retrieved from the cache memory. If the cache memory is inefficient in delivering these bilerps, image processing is slowed or degraded. Thus, what is needed are circuits, methods, and apparatus that efficiently store and retrieve texels for these different types of filtering.